April 11, 2019
SiFive Tapes Out First in a Series of 7nm IP Enablement Platforms
Includes critical IP validation for HBM2E 3.2Gbps Interface, TCAM and more
SAN MATEO, Calif. — April 11, 2019 —
SiFive, the leading provider of commercial RISC-V processor IP and custom SoC solutions, today announced it has successfully taped out an IP enablement platform in 7nm FinFET technology that includes critical IP validation for SiFive's high bandwidth memory (HBM2E) 3.2Gbps interface, 2GHz Ternary Content-Addressable Memory (TCAM) partner IP, a low-voltage differential signaling (LVDS) interface and other key IP building blocks. The high-speed IP interface enablement platform is the first in a series of SiFive's next-generation platforms for high-performance and high-bandwidth applications. The forthcoming 7nm IP enablement platforms are:
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HBM2E 2.5D ASIC SiP based on SiFive's RISC-V Core IP with vector extension, TileLink - a high-performance, scalable, cache-coherent fabric; high-performance caches; HBM2E controller and PHY; support for low latency HBM memory; DMA and peripherals.
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Customizable Freedom Revolution AI SoC platform based on SiFive's 64-bit U7 and S7 Series RISC-V Multi-Core IP, TileLink, accelerator bays to connect a custom accelerator into the system, security IP, LPDDR5, an HBM2E controller and PHY, a PCIe5 SerDes and 56/112G SerDes.
"The design revolution taking place in the semiconductor industry has created unprecedented architectural freedom through customizable SoCs," said Shafy Eltoukhy, senior vice president and general manager of the Custom SoC Business Unit at SiFive. "Our IP enablement platforms include internally developed IP along with the most robust, high-performance partner IP on the market for next-generation AI, networking and other high-performance applications in 7nm."
About SiFive
SiFive is the leading provider of market-ready processor core IP, development tools and silicon solutions based on the free and open RISC-V instruction set architecture. Led by a team of seasoned silicon executives and the RISC-V inventors, SiFive helps SoC designers reduce time-to-market and realize cost savings with customized, open-architecture processor cores, and democratizes access to optimized silicon by enabling system designers in all market verticals to build customized RISC-V based semiconductors. Located in Silicon Valley, SiFive has backing from Sutter Hill Ventures, Spark Capital, Osage University Partners, Chengwei, Huami, SK Hynix, Intel Capital, and Western Digital. For more information, www.sifive.com.