Beyond the CPU and GPU: SiFive in Datacenter Infrastructure
How embedded RISC-V processors in NICs, retimers, optics, switches, and security chips are overcoming modern scaling limits
SiFive Blog
The latest insights, and deeper technology dives, from RISC-V leaders
The SiFive blog is your go-to-source for updates on all things RISC-V including processor IP, chip architecture, software and other innovations. Whether you’re producing the next great consumer device, optimizing a datacenter or building next-generation autos check back often to hear the latest from our experts.
The Next Leap in Datacenter AI: Orchestrating Custom Accelerators with SiFive Intelligent Control Units (ACUs)
SiFive's Intelligence Family compute engines are the ideal Accelerator Control Unit (ACU) to work with customers' custom accelerators. These core and core complexes act as a dedicated, programmable RISC-V front-end controller to command and control.
SiFive Perspective: RISC-V SPMP Specification Ratification is a Leap Forward for Embedded Security
SiFive explains how Ratification of the SPMP specification is good news for embedded security.
Introducing SKL: The SiFive Kernel Library
SiFive makes available an open-source collection of highly-optimized computational routines for the RISC-V Vector ISA (RVV) and its various extensions, including SiFive’s matrix engines
RISC-V EU Summit 2026: An Ecosystem Coming of Age
I recently returned from the RISC-V Europe Summit 2026 in Bologna and, like many attendees, I came away energized by the announcements, the technical discussions and the sheer number of people building products around RISC-V.
Inside the SiFive Performance™ P570 Gen 3: High Performance Efficiency for Next-Generation Consumer and Commercial Applications
SiFive is evolving the building blocks of RISC-V-based IP that are reimagining and democratizing every computing platform. We take a closer look at the new Performance P570 Gen 3 and its next-gen applications.