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April 2018
SiFive - April 25, 2018
RISC-V QEMU Part 2: The RISC-V QEMU port is upstream
QEMU 2.12.0 was released on April 24th 2018 and this version is the first official QEMU version to contain the RISC-V port. This is yet another milestone towards the development of the Open Source RISC-V tools on top of the recent acceptance of RISC-V in Linux kernel 4.15 in December last year and GLIBC 2.27 this past February.
SiFive - April 17, 2018
Dover Microsystems Brings Real-Time Chip Security to SiFive’s DesignShare
Boy have we been busy. Over the last few months, our DesignShare ecosystem has continued to expand, and, this week, we were excited to welcome Dover Microsystems into the program.
SiFive - April 16, 2018
The SiFive Download - The Next Revolution is Here!
First, we are thrilled to have recently announced that we raised $50.6 million in our Series C funding round! We wanted to thank our existing and new investors - including Chengwei Capital, Huami, SK Telecom and Western Digital - for the continued support and new engagement, so we held a party to celebrate!
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